<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>Low-Latency on Tuan Hiep TRAN — System Design &amp; AI Infra</title><link>https://tuanhiep.github.io/tags/low-latency/</link><description>Recent content in Low-Latency on Tuan Hiep TRAN — System Design &amp; AI Infra</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Sun, 22 Feb 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://tuanhiep.github.io/tags/low-latency/index.xml" rel="self" type="application/rss+xml"/><item><title>Stock Exchange Core (3/4): High Availability &amp; Deterministic Fault Tolerance</title><link>https://tuanhiep.github.io/posts/series_1/3.stock_exchange_architecture/</link><pubDate>Sun, 22 Feb 2026 00:00:00 +0000</pubDate><guid>https://tuanhiep.github.io/posts/series_1/3.stock_exchange_architecture/</guid><description>How to survive hardware crashes without a database. We explore Event Sourcing, the Sequencer pattern, and UDP Multicast to achieve 99.999% uptime in a single-threaded architecture.</description></item><item><title>Stock Exchange Core (2/4): The Single-Threaded Matching Engine</title><link>https://tuanhiep.github.io/posts/series_1/2.stock_exchange_matching_engine/</link><pubDate>Fri, 20 Feb 2026 00:00:00 +0000</pubDate><guid>https://tuanhiep.github.io/posts/series_1/2.stock_exchange_matching_engine/</guid><description>Why multi-threading kills High-Frequency Trading systems. We explore lock-free concurrency, Mechanical Sympathy, and the LMAX Disruptor pattern to achieve sub-microsecond matching.</description></item><item><title>Stock Exchange Core (1/4): Anatomy of a Microsecond Order Book</title><link>https://tuanhiep.github.io/posts/series_1/1.stock_exchange_order_book/</link><pubDate>Wed, 18 Feb 2026 00:00:00 +0000</pubDate><guid>https://tuanhiep.github.io/posts/series_1/1.stock_exchange_order_book/</guid><description>Designing a high-frequency trading Order Book. We formalize memory layout, trace state execution, and achieve strict O(1) cancellations.</description></item></channel></rss>